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ADC Resolution & Noise Budget

Signal & Timing

What one LSB is worth, how many bits the noise leaves, and whether the input settles in time.

Inputs

Usually the reference voltage
V
Including any divider or filter resistor
Ω
10 kΩ
1.57 × fc for one RC pole
Hz
10 kHz
°C
From the ADC datasheet; a few pF to tens of pF
F
10 pF
From the ADC datasheet.
Ω
1 kΩ
s
1 µs
Hz
5 kHz
Hz
100 kHz
Leakage
A

Results

1 passed · 1 to check
1 LSB
805.7µV
kT/C noise 

0.025 LSB
20.29µV
Time to settle 12 bits
991ns
Effective bits (ENOB)
12.0
All results (4)
Ideal SNR
74.0dB
Acquisition time constant
110ns
Source thermal noise
Noise density of the source
This front end at each resolution
Resolution1 LSBIdeal SNRkT/C noiseSettling time
8 bits
10 bits
12 bits
14 bits
16 bits
18 bits
20 bits
24 bits

Accuracy

Verified against

2 independent cases. See the working.

This is a design aid. The engineer remains responsible for the design and for checking the standard itself.

Parameter sweep

Vary one input over a range and see the answer and verdict at each step, as a table and a curve.Pro

Worst-case corners

Put a tolerance on each input and get the worst-case band around the answer.Pro

Parts that track move together.Inputs in the same group move together, like the parts of a matched network. Leave independent parts ungrouped: that is the safe choice.

Circuit

The principle

An ADC's datasheet resolution is an upper bound. What you get depends on the noise on each sample, and on whether the sampling capacitor can charge through your source resistance in time.

Quantisation step
1  LSB=VFS2N1\;\t{LSB} = \frac{V_{FS}}{2^{N}}
Ideal signal-to-noise ratio
SNR=6.02 N+1.76  dBSNR = 6.02\,N + 1.76\;\t{dB}
For a full-scale sine wave with only quantisation noise. Every extra bit is 6.02 dB.
Sampling (kT/C) noise
vn,kTC=kBTCSv_{n,kTC} = \sqrt{\frac{k_B T}{C_S}}
The thermal noise of the resistance that charges CS, as each sample holds it. It does not depend on that resistance: 64 µV RMS on 1 pF, 20 µV on 10 pF at room temperature. Checked against half an LSB, where it costs one bit of ENOB.
Noise on each sample
σ=q2+vn,kTC2,q=LSB12\sigma = \sqrt{q^{2} + v_{n,kTC}^{2}}, \qquad q = \frac{\t{LSB}}{\sqrt{12}}
Quantisation noise and kT/C noise are independent, so their powers add.
Effective number of bits
SNR=20log⁡10 ⁣(VFS22 σ)  dB,ENOB=SNR−1.766.02SNR = 20\log_{10}\!\left(\frac{V_{FS}}{2\sqrt{2}\,\sigma}\right)\;\t{dB}, \qquad ENOB = \frac{SNR - 1.76}{6.02}
For a full-scale sine wave, VFS/(2√2) RMS, and never more than N. It counts quantisation and kT/C noise only: the converter's own noise and distortion, from its datasheet, lower it further.
Johnson–Nyquist (thermal) noise of a resistor
vn=4kBTR Δf,vnHz=4kBTRv_{n} = \sqrt{4 k_B T R\, \Delta f}, \qquad \frac{v_n}{\sqrt{\t{Hz}}} = \sqrt{4 k_B T R}
A 10 kΩ resistor at room temperature gives 12.8 nV/√Hz, about 1.3 µV RMS in a 10 kHz bandwidth. Shown for the source, and not added to σ: kT/C already counts the thermal noise of the resistance that charges CS.
Acquisition settling
tacq≥(RS+RSW)CSln⁡ ⁣(2 N+1)t_{acq} \geq \left(R_S + R_{SW}\right) C_S \ln\!\left(2^{\,N+1}\right)
A full-scale step settles to within half an LSB when e−t/τ ≤ 1/2N+1: about 9 time constants for 12 bits, 12 for 16 bits. Less than 20 % of the acquisition time in hand reads as marginal.
Leakage offset
Voff=Ileak RSV_{off} = I_{leak}\,R_S
The pin's leakage current flows in the source resistance. Marginal over half an LSB, a failure over 1 LSB.
Averaging gain
ΔSNR=10log⁡10(n)  dB  ⇒  ΔENOB=log⁡2n2\Delta SNR = 10\log_{10}(n)\;\t{dB} \;\Rightarrow\; \Delta ENOB = \frac{\log_2 n}{2}
Nyquist
fs>2fmaxf_{s} > 2 f_{max}
Anti-alias filter
fstop=fs−fmax,A=10log⁡10 ⁣(1+(fstopfc)2)  dBf_{stop} = f_{s} - f_{max}, \qquad A = 10\log_{10}\!\left(1 + \left(\frac{f_{stop}}{f_c}\right)^{2}\right)\;\t{dB}
fstop is the lowest frequency that folds into the signal band. A full-scale signal there must be down by the ideal SNR to fall below the quantisation noise. A is what one RC pole gives at fstop, with fc = Δf / 1.57.
  • VFSV_{FS}full-scale input span, usually the reference voltage
  • RSR_Stotal source resistance including any divider or filter resistor
  • RSWR_{SW}on-resistance of the sampling switch, from the ADC datasheet
  • CSC_Sthe ADC's internal sampling capacitor, a few pF to tens of pF
  • IleakI_{leak}input leakage current, from the ADC datasheet
  • kBk_BBoltzmann constant, 1.381 × 10⁻²³ J/K
  • TTabsolute temperature, in kelvin
  • qqRMS quantisation noise
  • Δf\Delta fnoise bandwidth; 1.57 × fc for a single pole
  • fmaxf_{max}highest signal frequency
More detail

Three common front-end faults

  • Too much source resistance. It stops the sampling capacitor charging in time. The usual fix is a buffer.
  • No real anti-alias filter. Anything above fs/2 folds into the band and cannot be told apart from signal.
  • Reference noise. The result is a ratio to the reference, so reference noise goes straight to the output. Decouple the reference and keep it away from switching loads.
Work out 1 LSB first. At 12 bits on 3.3 V it is 800 µV, which leaves room. At 20 bits it is 3 µV, and trace resistance, thermocouple effects at solder joints (µV/°C) and amplifier 1/f noise matter more than the ADC.

Layout

Keep the input trace short, away from switching nodes and over a solid return plane. Put the anti-alias capacitor at the pin and return it to the ADC's analogue ground, not a distant power ground. On a mixed-signal MCU, feed the analogue supply through a ferrite or small LDO and decouple it locally.

Further reading: Walt Kester (ed.), The Data Conversion Handbook, Analog Devices, for quantisation noise, SNR and ENOB; Behzad Razavi, Design of Analog CMOS Integrated Circuits, for kT/C noise. Take CS, RSW and the leakage from your converter's datasheet. Related: Voltage Divider (source impedance into an ADC), RC / RL Filter & Time Constant (anti-alias and settling).

Engine version ⁨1.26.4⁩