✓kT/C noise is 20.3 µV RMS = 0.025 LSB, below half an LSB.
!Acquisition is marginal: it settles in 991 ns of the 1 µs available (9.0 time constants of 110 ns), a margin of 0.9 %. Aim for 20 % or more.
i
Anti-alias: 95 kHz and above must be down by 74 dB. One RC pole at 6.37 kHz gives 23.5 dB there.
This front end at each resolution
Resolution
1 LSB
Ideal SNR
kT/C noise
Settling time
8 bits
12.9 mV
49.9 dB
0.00157 LSB
686 ns
10 bits
3.22 mV
62.0 dB
0.0063 LSB
839 ns
12 bits
806 µV
74.0 dB
0.0252 LSB
991 ns
14 bits
201 µV
86.0 dB
0.101 LSB
1.14 µs
16 bits
50.4 µV
98.1 dB
0.403 LSB
1.3 µs
18 bits
12.6 µV
110.1 dB
1.61 LSB
1.45 µs
20 bits
3.15 µV
122.2 dB
6.45 LSB
1.6 µs
24 bits
197 nV
146.2 dB
103 LSB
1.91 µs
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Circuit
المبدأ
An ADC's datasheet resolution is an upper bound. What you get depends on the noise on each sample, and on whether the sampling capacitor can charge through your source resistance in time.
Quantisation step
1LSB=2NVFS
Ideal signal-to-noise ratio
SNR=6.02N+1.76dB
For a full-scale sine wave with only quantisation noise. Every extra bit is 6.02 dB.
Sampling (kT/C) noise
vn,kTC=CSkBT
The thermal noise of the resistance that charges CS, as each sample holds it. It does not depend on that resistance: 64 µV RMS on 1 pF, 20 µV on 10 pF at room temperature. Checked against half an LSB, where it costs one bit of ENOB.
Noise on each sample
σ=q2+vn,kTC2,q=12LSB
Quantisation noise and kT/C noise are independent, so their powers add.
Effective number of bits
SNR=20log10(22σVFS)dB,ENOB=6.02SNR−1.76
For a full-scale sine wave, VFS/(2√2) RMS, and never more than N. It counts quantisation and kT/C noise only: the converter's own noise and distortion, from its datasheet, lower it further.
Johnson–Nyquist (thermal) noise of a resistor
vn=4kBTRΔf,Hzvn=4kBTR
A 10 kΩ resistor at room temperature gives 12.8 nV/√Hz, about 1.3 µV RMS in a 10 kHz bandwidth. Shown for the source, and not added to σ: kT/C already counts the thermal noise of the resistance that charges CS.
Acquisition settling
tacq≥(RS+RSW)CSln(2N+1)
A full-scale step settles to within half an LSB when e−t/τ ≤ 1/2N+1: about 9 time constants for 12 bits, 12 for 16 bits. Less than 20 % of the acquisition time in hand reads as marginal.
Leakage offset
Voff=IleakRS
The pin's leakage current flows in the source resistance. Marginal over half an LSB, a failure over 1 LSB.
Averaging gain
ΔSNR=10log10(n)dB⇒ΔENOB=2log2n
Nyquist
fs>2fmax
Anti-alias filter
fstop=fs−fmax,A=10log10(1+(fcfstop)2)dB
fstop is the lowest frequency that folds into the signal band. A full-scale signal there must be down by the ideal SNR to fall below the quantisation noise. A is what one RC pole gives at fstop, with fc = Δf / 1.57.
VFSfull-scale input span, usually the reference voltage
RStotal source resistance including any divider or filter resistor
RSWon-resistance of the sampling switch, from the ADC datasheet
CSthe ADC's internal sampling capacitor, a few pF to tens of pF
Ileakinput leakage current, from the ADC datasheet
kBBoltzmann constant, 1.381 × 10⁻²³ J/K
Tabsolute temperature, in kelvin
qRMS quantisation noise
Δfnoise bandwidth; 1.57 × fc for a single pole
fmaxhighest signal frequency
تفاصيل إضافية
Three common front-end faults
Too much source resistance. It stops the sampling capacitor charging in time. The usual fix is a buffer.
No real anti-alias filter. Anything above fs/2 folds into the band and cannot be told apart from signal.
Reference noise. The result is a ratio to the reference, so reference noise goes straight to the output. Decouple the reference and keep it away from switching loads.
Work out 1 LSB first. At 12 bits on 3.3 V it is 800 µV, which leaves room. At 20 bits it is 3 µV, and trace resistance, thermocouple effects at solder joints (µV/°C) and amplifier 1/f noise matter more than the ADC.
Layout
Keep the input trace short, away from switching nodes and over a solid return plane. Put the anti-alias capacitor at the pin and return it to the ADC's analogue ground, not a distant power ground. On a mixed-signal MCU, feed the analogue supply through a ferrite or small LDO and decouple it locally.
Further reading: Walt Kester (ed.), The Data Conversion Handbook, Analog Devices, for quantisation noise, SNR and ENOB; Behzad Razavi, Design of Analog CMOS Integrated Circuits, for kT/C noise. Take CS, RSW and the leakage from your converter's datasheet. Related:Voltage Divider (source impedance into an ADC), RC / RL Filter & Time Constant (anti-alias and settling).