Op-Amp Noise & DC Error
How many of your ADC's bits does this op-amp stage leave?
Could not save your rating. Try again.
هذه الصفحة غير مترجمة بالكامل بعد. الأجزاء غير المترجمة معروضة بالإنجليزية.
المدخلات
ملف اللوحةFills Ambient temperature from your board profile.
Temperature
Bias and noise details
النتائج
1.355 LSB
المعيار: Vdc ≤ your 2 LSB budget (2 mV), failing past 2 × (design margin): 0.677 × here, over ΔT 25 °C with Ios taken as Ib
أظهر خطوات الحساب
- Noise gain
NG = 1 + R_f / R₁ = 1 + 9 kΩ / 1 kΩ = 10 - Input noise density
e_ni = √(e_n² + i_n² × (R₊² + R₋²) + 4kT × (R₊ + R₋)) = √((5 nV/√Hz)² + (0.5 pA/√Hz)² × ((1 kΩ)² + (900 Ω)²) + 4k × 298.15 K × 1.9 kΩ) = 7.532 nV/√Hz - Output noise, peak-to-peak
v_pp = 6.6 × NG × e_ni × √BW = 6.6 × 10 × 7.532 nV/√Hz × √(15.7 kHz) = 62.29 µV = 0.0623 LSB - Bias error at the input
V_bias = |I_b| × |R₊ − R₋| + (I_os / 2) × (R₊ + R₋) = 10 nA × |1 kΩ − 900 Ω| + (10 nA / 2) × (1 kΩ + 900 Ω) = 10.5 µV - DC error at the output
V_dc = NG × (V_os + TCV_os × ΔT + V_bias) = 10 × (100 µV + 1 µV/°C × 25 °C + 10.5 µV) = 1.355 mV = 1.355 LSB
0.06229 LSB
16.0 before the cap at the ADC's 12 bits
0.25 LSB
كل النتائج (8)
1 LSB
0.105 LSB, with Ios taken as Ib
1.036 LSB
| Source | Resistance | Density | Share of the noise power |
|---|---|---|---|
| en | |||
| in × Rs | |||
| in × (R₁ ∥ Rf) | |||
| Thermal noise of Rs | |||
| Thermal noise of R₁ ∥ Rf |
إلى أي حد نعرف هذا الرقم
- Analog Devices MT-047
- Analog Devices MT-048
Analog Devices MT-047, Op Amp Noise المعادلة
Analog Devices MT-048, Op Amp Noise Relationships: 1/f Noise, RMS Noise, and Equivalent Noise Bandwidth المعادلة
The DC terms add with their signs aligned, so the DC error is a worst-case bound for the values entered, not a typical value. The noise counts the white region only, and the bias current usually sets most of the DC error when the input resistances are large.
عملياً يهيمن على عدم اليقين مدخل واحد: Bias current Ib. ضيّقه يضِق معه الجواب.
2 حالات في هذا الموقع تقارن هذه الحاسبة بأرقام حُسبت من دون كودها. اطّلع على الحساب.
هذه أداة مساعدة للتصميم. يبقى المهندس مسؤولاً عن التصميم وعن قراءة المرجع القياسي نفسه حيث يهم ذلك.
المسح البارامتري
غيّر مدخلاً واحداً على مدى، وشاهد الإجابة والحكم والهامش عند كل خطوة، جدولاً ومنحنى.Proأسوأ الحالات
أضف التفاوتات إلى المدخلات لتحصل على النطاق المضمون حول الإجابة الاسمية، لا الحالة النموذجية وحدها.ProCircuit
المبدأ
An op-amp stage in front of an ADC adds two kinds of error. Noise is random: the op-amp's own voltage and current noise and the thermal noise of the resistors, all taken up by the noise gain. DC error is fixed: the offset voltage, its drift with temperature and the bias currents in the resistors. This page gives each in volts and in LSB of your ADC, and the noise-free bits the stage leaves.
- noise gain: the gain the input noise and the offsets see
- R₁, plus the source resistance Rs in the inverting stage
- op-amp voltage and current noise densities, flat region
- resistance at the + and − inputs
- Boltzmann constant, 1.380649 × 10−23 J/K, and the absolute temperature
- noise bandwidth
- ADC full scale and resolution
- bias current and offset current
- offset voltage and its drift
- temperature change the offset drifts over
- output of the stage, where every error is given
تفاصيل إضافية
Noise and DC error, apart
A calibration can remove a fixed error, but not noise. So the page reports them apart: the DC error and the drift against your error budget, and the noise against the LSB, where up to 1 LSB p-p passes and past 4 LSB fails (design margins). The DC terms add at their worst signs; their root sum of squares, a common statistical estimate, is shown beside them.
1/f noise
Below its 1/f corner fce, an op-amp's voltage noise rises. This page counts the white region only. ADI MT-048 adds fce·ln(fH/fL) to the noise bandwidth for the 1/f region: with fce at BW/100, fL = 0.1 Hz and a 15.7 kHz bandwidth, that adds up to 12 % to the noise power. So from fce = BW/100 up, the answer is marked Unverified. For a zero-drift part, enter 0.
Bias current
Each input's bias current flows in the resistance that input sees. With R₊ = R₋ the Ib part cancels and Ios·R₊ is left, which is why the inverting stage has Rp. Rp adds noise of its own, which this page counts; a capacitor across it removes that noise. On bias-compensated and CMOS parts Ios is of the order of Ib, so matching gains little there.
Not modelled: CMRR, PSRR, resistor tolerance and excess noise, the gain error, and the 1/f region of in. Ib rises with temperature, on a FET input roughly doubling every 10 °C, so enter it at your hottest. With no filter after the stage, its own bandwidth, about GBW/NG, sets the noise bandwidth.
إصدار المحرك 1.26.4