Boost Converter Design
Will this boost deliver the current without saturating the inductor or fighting its own loop?
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Inputs
Ratings and loop
Results
Checked: Ipk ≤ 0.8 × Isat, design margin: 0.724 × your 3 A inductor
Show working
- Duty cycle
D = 1 − η × V_in / V_out = 1 − 0.9 × 3.6 / 12 = 0.73 - Average inductor current
I_L = V_out × I_out / (η × V_in) = 12 × 0.5 / (0.9 × 3.6) = 1.852 A - Inductor ripple
ΔI_L = V_in × D / (f_sw × L) = 3.6 × 0.73 / (500 kHz × 8.2 µH) = 641 mA - Peak inductor current
I_pk = I_L + ΔI_L / 2 = 1.852 + 0.641 / 2 = 2.172 A
All results (9)
below this load expect DCM or pulse skipping, unless a synchronous controller runs forced PWM
minimum ratings: IF,avg ≥ Iout, IF,pk ≥ Ipk, VR ≥ Vout
Accuracy
- Texas Instruments SLVA372
- Erickson and Maksimović
Texas Instruments SLVA372, Basic Calculation of a Boost Converter's Power Stage, B. Hauke the equation
Erickson and Maksimović, Fundamentals of Power Electronics the equation
They leave out the inductance lost near saturation, so check the inductor curve at your peak current. The efficiency you enter sets the input current, and with it the peak.
Most of the uncertainty comes from Estimated efficiency. Tighten that first.
2 independent cases. See the working.
This is a design aid. The engineer remains responsible for the design and for checking the standard itself.
Parameter sweep
Vary one input over a range and see the answer and verdict at each step, as a table and a curve.ProWorst-case corners
Put a tolerance on each input and get the worst-case band around the answer.ProCircuit
The principle
A boost converter stores energy in its inductor while the switch is on, and the diode passes it to the output on top of Vin, so the output sits above the input. Volt-second balance on the inductor sets the duty cycle, and from it the inductor currents, the output ripple and the right-half-plane zero that limits the loop. Check the design at the lowest input, where duty and peak current are highest.
- duty cycle of the switch
- estimated efficiency at this load
- average inductor current, equal to the input current
- peak-to-peak inductor ripple current
- ripple ratio, ΔIL / IL
- equivalent series resistance of the whole output capacitor bank
- load resistance at full load, Vout / Iout
- loop crossover frequency
More detail
The RHP zero
A boost delivers energy to the output only while the switch is off, so a step up in duty first lowers the output before it raises it. That is the right-half-plane zero. It adds phase lag of arctan(fc/fRHPZ): 11.3° with crossover at fRHPZ/5 and 18.4° at fRHPZ/3 (Erickson and Maksimović). The 5 and the 3 are design margins, not a standard.
Synchronous parts
With a synchronous switch in place of the diode, the TI SLVA372 equations all still apply except its diode-loss one, and the diode ratings become the second switch's. A synchronous part run in forced PWM stays in CCM at light load.
SEPIC is not covered.
Engine version 1.26.4